1. Field of the Invention
The present invention relates to a high definition television receiver for decoding a high definition television signal having a compressed band width to an original high definition television signal, and in particular, to an automatic gain control system for performing a signal level control in converting an analog signal to a digital signal.
2. Description of the Related Art
In order to transmit a high definition television signal by using a broadcasting satellite, a system capable of transmitting a high definition television signal via band width compression has been proposed in "A Satellite First Channel Transmission System for High Definition Television (MUSE)", Television Society Technical Report Material, TEBS 95-2, Vol. 7 No. 441; "A Satellite Broadcasting System of High Vision (MUSE)", Television Society All-Japan Meeting Material, 1987, 12-6.
This system is described in greater detail in the documents mentioned above, and the description thereof is omitted here. However, an arrangement (allocation of signals) of a MUSE signal will be described as to a signal format briefly with reference to FIG. 3.
A synchronizing signal consists of a frame pulse and a horizontal synchronizing signal and they are present respectively in a frame pulse section a and a horizontal synchronizing signal section b. A video signal is a time axis multiplexed signal of a color signal and a luminance signal which are respectively present in a color signal section c and a luminance signal section d. As a signal for controlling, there is a control signal which is present in a control section e. A sound signal is present in a sound/additional information section f together with additional information. Clamp level information is present in a clamp level section g. A horizontal line number is indicated for each of these signals.
FIG. 4 shows the format of the MUSE signal in the form of a waveform. As will be appreciated from the waveform, frame pulses 1 and 2 ar inserted every other field.
In this MUSE signal, a clamp level is at a center level of the amplitude of the MUSE signal, and for example, in the case of quantizing by 8 bits, the clamp level is specified to be at a 128th gradation of 256 gradations. Furthermore, the frame pulse 1 is at a 100% level of the signal amplitude, and it corresponds to a white clip level and a 239th gradation of the 256 gradations. The frame pulse 2 is at a 0% level of the signal amplitude, and it corresponds to a black level and is specified at a 16th gradation of the 256 gradations.
FIG. 5 is a block diagram of a prior art automatic gain control system. The reference numeral 1 designates a clamping circuit for softly clamping a horizontal synchronizing signal period of a MUSE signal by a horizontal pulse, 2 an A/D converter for converting the clamped MUSE signal to a digital signal, and 3 a clamp level control circuit for generating a clamp level control signal by detecting a difference digitally between a level of the 128th gradation of 256 gradations (referred to as a 128/256 level) and a level indicated by clamp level information in each of horizontal line numbers 563 and 1125. Reference numeral 4 designates a D/A converter for converting a digital signal for controlling the clamp level delivered from the clamp level control circuit 3 into an analog signal. Reference numeral 5 designates a DC level control circuit for controlling an offset of a DC voltage so that the clamp level control voltage from the D/A converter 4 becomes a clamp voltage optimum to the specification of the input of the A/D converter 2. Reference numeral 6 designates a frame pulse control circuit for generating a frame pulse level control signal by detecting differences digitally as to the amplitudes of the frame pulses, between a level indicated by information of the frame pulse No. 1 in a horizontal line number 1 and a 239/256 level, and between a level indicated by information of the frame pulse No. 2 in a horizontal line number 2 and a 16/256 level. Reference numeral 7 designates a D/A converter for converting a digital signal from the frame pulse level control circuit 6 into an analog signal. Reference numeral 8 designates a reference voltage control circuit for generating reference voltages for deciding a conversion range of the A/D converter 2 by the frame pulse level control voltage from the D/A converter 7.
In the prior art automatic gain control system as arranged as mentioned above, the clamping circuit 1, A/D converter 2, clamp level control circuit 3, D/A converter 4, and DC level control circuit 5 constitute an automatic clamp level control loop. Furthermore, the A/D converter 2, frame pulse level control circuit 6, D/A converter 7, and reference voltage control circuit 8 constitute an automatic amplitude control loop. When a MUSE signal of a normal amplitude is applied to the automatic gain control system, it is controlled so that each output voltage of the D/A converter 4 and the D/A converter 7 is zero voltage. In this case, when the automatic amplitude control loop is turned off and the A/D converter 2 is being supplied with normal reference voltages without changing the control of the reference voltages, even when the amplitude of the MUSE signal is increased or decreased from the normal amplitude, no clamp level change is caused in the clamped output of the clamping circuit 1 because the MUSE signal is clamped at its center amplitude value (an equivalent level to the clamp level line), and this clamped output is inputted to the A/D converter 2. As a result, the operation of the clamp level control circuit 3 is not changed, and the D/A converter 4 and the DC level control circuit 5 are also not changed. In other words, it is configured such that when the automatic amplitude control loop is maintained turned off, the automatic clamp level control loop is not affected by an amplitude change in the MUSE signal. However, where the automatic amplitude control loop is being turned on, the automatic clamp level control loop is also affected. The operation in such a case will now be described.
FIG. 6 shows a concrete circuit of the reference voltage control circuit 8. Resistors 10 and 11 having resistances R1 and R2 generates a voltage Vl at the junction point thereof. Resistors 12 and 13, an operational amplifier 14, and a transistor 15 constitute an inverted amplifier having a gain of 1 time, and it supplies a voltage -Vl as a reference voltage (Vref1) to the A/D converter 2. Resistors 16 and 17, an operational amplifier 18, and a transistor 19 constitute an inverted amplifier having a gain of 3 times, and it supplies a voltage -3Vl as a reference voltage (Vref2) to the A/D converter 2. Resistors 20 and 21, and an operational amplifier 22 constitute an inverted amplifier having a gain of 1 time, and resistors 23 and 24 generate a voltage Vl at the junction point thereof, and an offset voltage Vl is applied to the inverted amplifier. A resistor 25 serves as a gain adjusting resistor for controlling the reference voltages of the A/D converter 2 by a control output voltage of the D/A converter 7.
In the reference voltage control circuit 8 as configured as mentioned above, when a MUSE signal inputted has a normal amplitude, the output voltage of the D/A converter 7 becomes zero voltage. As a result, the output of the operational amplifier 22 is a voltage Vl, and no current flows through the resistor 25. Thus, the divided voltage Vl of the resistors 10 and 11 is not changed, and the reference voltages of the A/D converter 2 become respectively -Vl and -3Vl.
FIG. 7 shows various conditions of the reference voltages of the A/D converter 2, in which when the input level is normal, the reference voltages are shown at a.
Now it is supposed that, the level of the inputted MUSE signal is increased by about 1 dB from the normal level. The frame pulse level control circuit 6 detects a difference between a frame pulse level and a normal level, and generates a digital difference signal for controlling the level of the frame pulse having the amplitude increasing. The digital difference signal is supplied to the D/A converter 7. The D/A converter 7 generates at its output a voltage -Vo. This voltage -Vo is supplied to the operational amplifier 22 and an output of a voltage VI+Vo is produced. A current flows through the resistor 25 to the voltage dividing point of the resistors 10 and 11 to produce a voltage Vl+.DELTA.vo. As a result, the reference voltages of the A/D converter 2 become respectively (-Vl -.DELTA.vo) and (-Vl -3.DELTA.vo). An increment in the dynamic range of both the reference voltages is 2.DELTA.vo, and since this increment corresponds to about 1 dB, this increment in the range corresponds to an increment in the amplitude inputted to the A/D converter 2. As described above, although the dynamic range of the A/D converter 2 can be retained, a DC voltage shift of the reference voltages amounting to -2.DELTA.vo is generated. This condition is shown at b in FIG. 7.
Next, it is supposed that the level of the inputted MUSE signal is decreased by about 1 dB from the normal level. Similarly to the foregoing, the frame pulse level control circuit 6 generates a digital difference signal for controlling the level of a frame pulse whose amplitude is decreased, and the D/A converter 7 generates a voltage +Vo at the output thereof. This voltage +Vo is supplied to the operational amplifier 22, and a voltage Vl-Vo is outputted. A current flows from the voltage dividing point of the resistors 10 and 11 through the resistor 25. As a result, a voltage Vl-.DELTA.vo is generated at the voltage dividing point of the resistors 10 and 11. Consequently, the reference voltages of the A/D converter 2 become respectively (-Vl+.DELTA.vo) and (-Vl+3.DELTA.vo). A decrement in the dynamic range of both the reference voltages is 2.DELTA.vo, and since this decrement corresponds to about 1 dB, this decrement in the range corresponds to a decrement in the amplitude inputted to the A/D converter 2. In this manner, although the dynamic range of the A/D converter 2 can be insured, a DC voltage shift of the reference voltages amounting to +2.DELTA.vo is generated. This condition is shown at in FIG. 7.
However, the prior art automatic gain control system configured as described above involves a problem in that when the input level of a MUSE signal is increased or decreased from a normal level, the automatic amplitude control loop is operated and the two reference voltages of the A/D converter are changed. Thus, although the dynamic range can be ensured, since the two reference voltages change in the same direction, the center potential is shifted. Accordingly, in order to correct this, it is necessary that the automatic clamp level control loop is also operated. In other words, the automatic amplitude control loop and the automatic clamp level control loop have to be controlled simultaneously. However, the response characteristics and the loop gains of the two loops are complicated, and an input range corresponding to the reference voltages of the A/D converter is biased to one side, and it is difficult to maintain a satisfactory linearity.